? semiconductor components industries, llc, 2004 november, 2004 ? rev. 8 1 publication order number: UAA2016/d UAA2016 zero voltage switch power controller the UAA2016 is designed to drive triacs with the zero voltage technique which allows rfi?free power regulation of resistive loads. operating directly on the ac power line, its main application is the precision regulation of electrical heating systems such as panel heaters or irons. a built?in digital sawtooth waveform permits proportional temperature regulation action over a 1 c band around the set point. for energy savings there is a programmable temperature reduction function, and for security a sensor failsafe inhibits output pulses when the sensor connection is broken. preset temperature (i.e. defrost) application is also possible. in applications where high hysteresis is needed, its value can be adjusted up to 5 c around the set point. all these features are implemented with a very low external component count. features ? pb?free package is available ? zero voltage switch for triacs, up to 2.0 kw (mac212a8) ? direct ac line operation ? proportional regulation of temperature over a 1 c band ? programmable temperature reduction ? preset temperature (i.e. defrost) ? sensor failsafe ? adjustable hysteresis ? low external component count figure 1. representative block diagram sense input sampling full wave logic + - 1/2 failsafe hysteresis adjust 4 3 4-bit dac temperature reduction voltage reference internal reference + 1 + v ee 5 pulse amplifier supply voltage + output 6 7 2 11-bit counter +v cc sync UAA2016 8 synchronization see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information 1 8 pdip?8 p suffix case 626 1 8 soic?8 d suffix case 751 http://onsemi.com zero voltage switch power controller 3 v ref 1 pin connections 4 8 7 6 5 2 hys. adj. sensor temp. reduc. sync v cc output v ee (top view) marking diagrams 2016x alyw 1 8 UAA2016p awl yyww x = a or d a = assembly location wl, l = wafer lot yy, y = year ww, w = work week
UAA2016 http://onsemi.com 2 maximum ratings (voltages referenced to pin 7) rating symbol value unit supply current (i pin 5 ) i cc 15 ma non?repetitive supply current, (pulse width = 1.0 s) i ccp 200 ma ac synchronization current i sync 3.0 ma pin voltages v pin 2 v pin 3 v pin 4 v pin 6 0; v ref 0; v ref 0; v ref 0; v ee v v ref current sink i pin 1 1.0 ma output current (pin 6), (pulse width < 400 s) i o 150 ma power dissipation p d 625 mw thermal resistance, junction?to?air r ja 100 c/w operating temperature range t a ? 20 to + 85 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. electrical characteristics (t a = 25 c, v ee = ?7.0 v, voltages referred to pin 7, unless otherwise noted.) characteristic symbol min typ max unit supply current (pins 6, 8 not connected), (t a = ? 20 to + 85 c) i cc ? 0.9 1.5 ma stabilized supply voltage (pin 5), (i cc = 2.0 ma) v ee ?10 ?9.0 ?8.0 v reference voltage (pin 1) v ref ?6.5 ?5.5 ?4.5 v output pulse current (t a = ? 20 to + 85 c), (r out = 60 w, v ee = ? 8.0 v) i o 90 100 130 ma output leakage current (v out = 0 v) i ol ? ? 10 a output pulse width (t a = ? 20 to + 85 c) (note 1), (mains = 220 vrms, r sync = 220 k ) t p 50 ? 100 s comparator offset (note 5) v off ?10 ? +10 mv sensor input bias current i ib ? ? 0.1 a sawtooth period (note 2) t s ? 40.96 ? sec sawtooth amplitude (note 6) a s 50 70 90 mv temperature reduction voltage (note 3), (pin 4 connected to v cc ) v tr 280 350 420 mv internal hysteresis voltage, (pin 2 not connected) v ih ? 10 ? mv additional hysteresis (note 4), (pin 2 connected to v cc ) v h 280 350 420 mv failsafe threshold (t a = ? 20 to + 85 c) (note 7) v fsth 180 ? 300 mv 1. output pulses are centered with respect to zero crossing point. pulse width is adjusted by the value of r sync . refer to application curves. 2. the actual sawtooth period depends on the ac power line frequency. it is exactly 2048 times the corresponding period. for the 50 hz case it is 40.96 sec. for the 60 hz case it is 34.13 sec. this is to comply with the european standard, namely that 2.0 kw loads can not be connected or removed from the line more than once every 30 sec. 3. 350 mv corresponds to 5 c temperature reduction. this is tested at probe using internal test pad. smaller temperature reduction can be obtained by adding an external resistor between pin 4 and v cc . refer to application curves. 4. 350 mv corresponds to a hysteresis of 5 c. this is tested at probe using internal test pad. smaller additional hysteresis can be obtained by adding an external resistor between pin 2 and v cc . refer to application curves. 5. parameter guaranteed but not tested. worst case 10 mv corresponds to 0.15 c shift on set point. 6. measured at probe by internal test pad. 70 mv corresponds to 1 c. note that the proportional band is independent of the ntc value. 7. at very low temperature the ntc resistor increases quickly. this can cause the sensor input voltage to reach the failsafe thr eshold, thus inhibiting output pulses; refer to application schematics. the corresponding temperature is the limit at which the circuit works in the ty pical application. by setting this threshold at 0.05 v ref , the ntc value can increase up to 20 times its nominal value, thus the application works below ? 20 c. ordering information device operating temperature range package shipping 2 UAA2016d soic?8 98 units / rail UAA2016ad soic?8 98 units / rail UAA2016p t a = ?20 to +85 c pdip?8 1000 units / rail UAA2016pg a pdip?8 (pb?free) 1000 units / rail 2for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
UAA2016 http://onsemi.com 3 load c f mac212a8 r out 8 5 r sync v ee v ref temp. red. r def hys adj s2 r s figure 1. application schematic r 1 synchronization + 1 s1 r 2 4 r 3 - 11-bit counter 4-bit dac 3 UAA2016 1/2 failsafe pulse amplifier sampling full wave logic internal reference supply voltage 2 +v cc 7 output 6 r s sync + ++ sense input ntc 220 vac application information (for simplicity, the led in series with r out is omitted in the following calculations.) triac choice and r out determination depending on the power in the load, choose the triac that has the lowest peak gate trigger current. this will limit the output current of the UAA2016 and thus its power consumption. use figure 4 to determine r out according to the triac maximum gate current (i gt ) and the application low temperature limit. for a 2.0 kw load at 220 v rms, a good triac choice is the on semiconductor mac212a8. its maximum peak gate trigger current at 25 c is 50 ma. for an application to work down to ? 20 c, r out should be 60 . it is assumed that: i gt (t) = i gt (25 c) exp (?t/125) with t in c, which applies to the mac212a8. output pulse width, r sync the pulse with t p is determined by the triac's i hold , i latch together with the load value and working conditions (frequency and voltage): given the rms ac voltage and the load power, the load value is: r l = v 2 rms/power the load current is then: i load (vrms 2 sin(2 ft)v tm ) r l where v tm is the maximum on state voltage of the triac, f is the line frequency. set i load = i latch for t = t p /2 to calculate t p . figures 6 and 7 give the value of t p which corresponds to the higher of the values of i hold and i latch , assuming that v tm = 1.6 v. figure 8 gives the r sync that produces the corresponding t p . r supply and filter capacitor with the output current and the pulse width determined as above, use figures 9 and 10 to determine r supply , assuming that the sinking current at v ref pin (including ntc bridge current) is less than 0.5 ma. then use figure 11 and 12 to determine the filter capacitor (c f ) according to the ripple desired on supply voltage. the maximum ripple allowed is 1.0 v. temperature reduction determined by r 1 (refer to figures 13 and 14.)
UAA2016 http://onsemi.com 4 figure 2. comparison between proportional control and on/off control overshoot time (minutes, typ.) time (minutes, typ.) time (minutes, typ.) heating power p(w) room temperature t ( c) time (minutes, typ.) proportional band proportional temperature control reduced overshoot good stability on/off temperature control large overshoot marginal stability t p is centered on the zero-crossing. ac line waveform i latch t p i hold figure 3. zero voltage technique gate current pulse f = ac line frequency (hz) vrms = ac line rms voltage (v) r sync = synchronization resistor ( ) t p 14 x r sync 7 10 5 vrms 2 x f ( m s)
UAA2016 http://onsemi.com 5 circuit functional description power supply (pin 5 and pin 7) the application uses a current source supplied by a single high voltage rectifier in series with a power dropping resistor. an integrated shunt regulator delivers a v ee voltage of ? 8.6 v with respect to pin 7. the current used by the total regulating system can be shared in four functional blocks: ic supply, sensing bridge, triac gate firing pulses and zener current. the integrated zener, as in any shunt regulator, absorbs the excess supply current. the 50 hz pulsed supply current is smoothed by the large value capacitor connected between pins 5 and 7. temperature sensing (pin 3) the actual temperature is sensed by a negative temperature coefficient element connected in a resistor divider fashion. this two element network is connected between the ground terminal pin 5 and the reference voltage ? 5.5 v available on pin 1. the resulting voltage, a function of the measured temperature, is applied to pin 3 and internally compared to a control voltage whose value depends on several elements: sawtooth, temperature reduction and hysteresis adjust. (refer to application information.) temperature reduction for energy saving, a remotely programmable temperature reduction is available on pin 4. the choice of resistor r 1 connected between pin 4 and v cc sets the temperature reduction level. comparator when the positive input (pin 3) receives a voltage greater than the internal reference value, the comparator allows the triggering logic to deliver pulses to the triac gate. to improve the noise immunity, the comparator has an adjustable hysteresis. the external resistor r 3 connected to pin 2 sets the hysteresis level. setting pin 2 open makes a 10 mv hysteresis level, corresponding to 0.15 c. maximum hysteresis is obtained by connecting pin 2 to v cc . in that case the level is set at 5 c. this configuration can be useful for low temperature inertia systems. sawtooth generator in order to comply with european norms, the on/off period on the load must exceed 30 seconds. this is achieved by an internal digital sawtooth which performs the proportional regulation without any additional component. the sawtooth signal is added to the reference applied to the comparator negative input. figure 2 shows the regulation improvement using the proportional band action. noise immunity the noisy environment requires good immunity. both the voltage reference and the comparator hysteresis minimize the noise effect on the comparator input. in addition the effective triac triggering is enabled every 1/3 sec. failsafe output pulses are inhibited by the afailsafeo circuit if the comparator input voltage exceeds the specified threshold voltage. this would occur if the temperature sensor circuit is open. sampling full wave logic two consecutive zero?crossing trigger pulses are generated at every positive mains half?cycle. this ensures that the number of delivered pulses is even in every case. the pulse length is selectable by r sync connected on pin 8. the pulse is centered on the zero?crossing mains waveform. pulse amplifier the pulse amplifier circuit sinks current pulses from pin 6 to v ee . the minimum amplitude is 70 ma. the triac is then triggered in quadrants ii and iii. the effective output current amplitude is given by the external resistor r out . eventually, an led can be inserted in series with the triac gate (see figure 1). t a = - 20 c t a = 0 c 140 80 200 figure 4. output resistor versus triac gate current i gt , triac gate current specified at 25 c (ma) 20 60 160 180 40 50 40 30 60 120 100 r , output resistor ( ) out w figure 5. minimum output current versus output resistor t a = - 20 c t a = + 85 c 200 180 160 140 120 100 80 60 40 100 r out , output resistor ( ) 0 20 40 60 80 i , minimum output current (ma) out(min) t a = +10 c t a = -10 c
UAA2016 http://onsemi.com 6 f = 50 hz 1.0 kw loads v tm = 1.6 v t a = 25 c 220 vrms 110 vrms 60 50 40 30 20 10 0 20 40 60 80 100 120 i latch(max) , maximum triac latch current (ma) f = 50 hz 2.0 kw loads v tm = 1.6 v t a = 25 c 220 vrms 110 vrms 120 100 80 60 40 20 60 50 40 30 20 10 0 i latch(max) , maximum triac latch current (ma) p m figure 6. output pulse width versus maximum triac latch current figure 7. output pulse width versus maximum triac latch current t , output pulse width ( s) p m t , output pulse width ( s) 110 vrms 220 vrms 100 80 60 40 20 0 100 200 300 400 t p , output pulse width ( s) v = 220 vrms f = 50 hz 200 s 150 s 100 s t p = 50 s 100 75 50 25 0 20 30 40 50 60 i o , output current (ma) f = 50 hz r , synchronization resistor (k ) sync w figure 8. synchronization resistor versus output pulse width figure 9. maximum supply resistor versus output current supply w r , maximum supply resistor (k ) i o , output current (ma) v = 110 vrms f = 50 hz 200 s 100 s t p = 50 s 100 75 50 25 0 10 15 20 25 30 t p = 50 s 100 s 150 s 200 s 40 50 60 70 80 90 100 80 60 40 20 0 ripple = 1.0 vp-p f = 50 hz i o , output current (ma) figure 10. maximum supply resistor versus output current figure 11. minimum filter capacitor versus output current r , maximum supply resistor (k ) supply w c , minimum filter capacitor ( f) f(min) m 150 s
UAA2016 http://onsemi.com 7 figure 12. minimum filter capacitor versus output current figure 13. temperature reduction versus r 1 ripple = 0.5 v p-p f = 50 hz 80 60 40 20 t p = 50 s 100 s 200 s 100 80 0 100 120 140 160 180 i o , output current (ma) 150 s c , minimum filter capacitor ( f ) f(min) m r 1 , temperature reduction resistor (k ) 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 100 90 80 70 60 50 40 30 20 10 0 100 k ntc 10 k ntc setpoint = 20 c t , temperature reduction ( r c) figure 14. temperature reduction versus temperature setpoint figure 15. r def versus preset temperature 6.0 5.6 5.2 4.8 4.4 4.0 30 26 22 18 14 10 t s , temperature setpoint ( c) 100 k ntc 10 k ntc r 1 = 0 t , temperature reduction ( r c) 30 4 3 2 1 0 t def , preset temperature ( c) 25 20 15 10 5 0 10 k ntc 100 k ntc r /(nominal ntc value) ratio def figure 16. r s + r 2 versus preset setpoint figure 17. comparator hysteresis versus r 3 8 6 4 2 0 10 k ntc r def = 29 k 100 k ntc r def = 310 k t def = 4 c 34 30 26 22 18 14 10 t s , temperature setpoint ( c) r + r /(nominal ntc value) ratio s2 r 3 , hysteresis adjust resistor (k ) 0 0.1 0.2 0.3 0.4 0.5 400 300 200 100 0 v , comparator hysteresis voltage (v) h (
UAA2016 http://onsemi.com 8 package dimensions pdip?8 p suffix case 626?05 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 ?a? ?b? ?t? seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040
UAA2016 http://onsemi.com 9 package dimensions soic?8 d suffix case 751?07 issue ad 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m
UAA2016 http://onsemi.com 10 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 UAA2016/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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